By Robert Bogdan Staszewski
A new and leading edge paradigm for RF frequency synthesis and instant transmitter design
Learn the suggestions for designing and enforcing an all-digital RF frequency synthesizer. unlike conventional RF thoughts, this leading edge publication units forth digitally extensive layout recommendations that paved the way to the advance of reasonably cheap, low-power, and hugely built-in circuits for RF capabilities in deep submicron CMOS strategies. additionally, the authors display how the structure permits readers to combine an RF front-end with the electronic back-end onto a unmarried silicon die utilizing common ASIC layout flow.
Taking a bottom-up technique that steadily builds talents and data, the e-book starts with an advent to simple innovations of frequency synthesis after which publications the reader via an all-digital RF frequency synthesizer design:
- Chapter 2 offers a digitally managed oscillator (DCO), that's the root of a singular structure, and introduces a time-domain version used for research and VHDL simulation
- Chapter three provides a hierarchical layer of mathematics abstraction to the DCO that makes it more straightforward to function algorithmically
- Chapter four builds a section correction mechanism round the DCO such that the system's frequency waft or wander functionality fits that of the solid exterior frequency reference
- Chapter five provides an program of the all-digital RF synthesizer
- Chapter 6 describes the behavioral modeling and simulation technique utilized in design
The ultimate bankruptcy provides the implementation of an entire transmitter and experimental effects. the radical principles awarded the following were applied and confirmed in high-volume, advertisement single-chip radios built at Texas tools: Bluetooth and GSM.
While the point of interest of the publication is on RF frequency synthesizer layout, the suggestions could be utilized to the layout of different digitally assisted analog circuits besides. This publication is a must-read for college kids and engineers who are looking to study a brand new paradigm for RF frequency synthesis and instant transmitter layout utilizing digitally extensive layout techniques.
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Additional resources for All-Digital Frequency Synthesizer in Deep-Submicron CMOS
Migrating to the digitally intensive RF front-end architecture brings with it the advantages of conventional digital design flow, including: . . . Fast design turnaround cycles using automated CAD tools (VHDL or Verilog hardware-level description language, synthesis, auto-place and auto-route with timing-driven algorithms, parasitic back-annotation, and post-layout optimization). Much lower parameter variability than with analog circuits. Ease of testability—automatic functional testing with good fault coverage.
Upon power-up or reset, the DCO is set at a center or “natural” resonant frequency fc by appropriate presetting of the dk inputs. This corresponds to a state in which varactors representing half or approximately half of the total capacitance are turned on to extend maximally the operational range in both directions. 11 Improving frequency resolution with SD dither of DCO varactors. frequency is fc ¼ 1 pﬃﬃﬃﬃﬃﬃﬃﬃ 2p LCc (2:16) During PVT mode, the DCO will approach the desired frequency f by setting the dP control bits appropriately so that the new total capacitance is Ctot, P ¼ Cc þ DC P (where DC P is a signed number).
The resulting final frequency of the PVT mode is fcP ¼ 1 pﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃ 2p LCtot, P (2:17) The acquisition mode will start from a new center frequency of fcP: It will approach the desired frequency f by appropriately setting the d A control bits so that the new total capacitance is Ctot, A ¼ Cc þ DC P þ DC A . The resulting final frequency of the acquisition mode is fcA ¼ 1 pﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃ 2p LCtot, A (2:18) Finally, the tracking mode will begin from a new center frequency of fcA . It will reach and maintain the desired frequency f by setting the d T control bits appropriately so that the new total capacitance is Ctot, T ¼ C0, tot þ Cc þ DC P þ DC A þ DC T .